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Mark: parity bit is always 1. Space: Parity bit is always 0. Mark and Space Parity do not allow for error detection. Options available: None/Even/Odd/Mark/Space. Stop Bits Stop bits indicate the end of a serial data packet. (A start bit indicates the beginning). The standard setting is 1 stop bit. Communication with slow devices may require more than 1 stop bit. Options available: 1/2. Flow Control Flow control can prevent data loss from buffer overflow. When sending data, if the receiving buffers are full, a 'stop' signal can be sent to stop the data flow. Once the buffers are empty, a 'start' signal can be sent to re-start the flow. Hardware flow control uses two wires to send start/stop signals. Options available: None/Hardware RTS/CTS. VT-UTF8 Combo Key Support Enable/Disable VT-UTF8 Combo Key Support. Options available: Enabled/Disabled. Default setting is Enabled. (Note) Advanced items prompt when this item is defined. 2-3 Chipset Menu The Chipset menu display submenu options for configuring the function of North Bridge and South Bridge. Select a submenu item, then press Enter to access the related submenu screen. 2-3-1 North Bridge Configuration Compatibility RID Enable/Disable Compatibility RID function. Options available: Enabled/Disabled. Default setting is Enabled. Total Memory Determines how much total memory is present during the POST. Current Memory Mode Displays the cuurent memory mode. Memory mode can be determined in Memory Mode item. Current Memory Speed Displays the cuurent memory speed. Memory Mode Determine the memory mode. When set to Indendent mode, all DIMMs are available to the operation system. When set to Mirroring mode, the motherboard maintains two identical (redundant) copies of all data in memory. When set to Lockstep mode, the motherboard uses two areas of memory to run the same set of operations in parallel. When set to Sparing mode, a preset threshold of coorectable errors is used to trigger fail-over. The spare memory is put online and used as active memory in place of the failed memory. Options available: Indpendent /Mirroring/ Lockstep/Sparing. 2-3-1-1 IOH Configuration IOH Configuration Intel(R) VT for Directed I/O Configuration Intel(R) I/OAT Enable/Disable Intel OAT Technology function. Options available: Enabled/Disabled. Default setting is Disabled. DCA Support Enable/Disable Direct Cache Access Support function. Options available: Enabled/Disabled. Default setting is Enabled. VGA Priority Define the display device priority. Options available: Onboard/Offboard. Default setting is Offboard. Target VGA Displays the information of Target VGA. Gen3 Equalization WA's Enable/DIsable the support for Gen3 Equalization Workaround. Options available: Enabled/Disabled. Default setting is Disabled. IOH Resource Selection Type When this item is set to Auto, PCI resources allocation across multiple IOHs is optimized automatically based on the PCI device present. When this item is set to Manual, user can force the PCI resource allocation across multiple IOHs based rations. Options available: Auto/Manual. Default setting is Auto. MMIOH Size Options available: 1GB/2GB/4GB/8GB/16GB/32GB/64GB/128GB. IOH 0/1 PCIe port Bifurcation Control IOU1 - PCIe Port Options available: x4x4/x8. PORT 1A Link Speed Options available: Gen1/Gen2. IOU2 - PCIe Port Options available: x4x4x4x4/x4x4x8/x8x4x4/x8x8/x16. PORT 2A Link Speed Options available: Gen1/Gen2/Gen3. IOU3 - PCIe Port Options available: x4x4/x8. PORT 3A Link Speed Options available: Gen1/Gen2/Gen3. Intel(R) VT-d Enable/Disable Intel VT-d Technology function. Options available: Enabled/Disabled. Default setting is Disabled. 2-3-1-2 DIMM Information DIMM Information: DIMM Group: CPU Socket 0 DIMM Information CPU Socket 0: DDR3_P0_A0/DDR3_P0_A1/DDR3_P0_B0/DDR3_P0_B1 Status DDR3_P0_C0/DDR3_P0_C1/DDR3_P0_D0/DDR3_P0_D1 Status The size of memory installed on each of the DDR3 slots. 2-3-2 South Bridge Configuration PCH Information: Name/Stepping Information Displays the name and stepping information of the south bridge. PCH Compatibility RID Enable/Disable the support for PCH Compatibility Revision ID (CRID) functionality. Options available: Enabled/Disabled. Default setting is Disabled. GbE Controller Enable/Disable onboard GbE LAN controller. Options available: Enabled/Disabled. Default setting is Enabled. Wake on Lan from S5 Enable/Disable GbE control PXE in S5. Options available: Enabled/Disabled. Default setting is Enabled. Restore on AC Power Loss Defines the power state to resume to after a sys-tem shutdown that is due to an interruption in AC power. When set to Last State, the system will return to the active power state prior to shutdown. When set to Stay Off, the system remains off after power shutdown. Options available: Last State/Stay Off/Power On. The default setting depends on the BMC setting. Deep Power off Mode Enable/Disable Deep Power off Mode. Options available: Enabled/Disabled. Default setting is Enabled. Onboard SATA RAID...