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Istruzioni per l'uso Cypress, Modello CY25819

Produttore : Cypress
File Size : 105.12 kb
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Lingua di insegnamento: en

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–65°C to + 150°C Input Voltage Relative to Vdd:.............................. Vdd + 0.3V Table 4. DC Electrical Characteristics Vdd = 3.3V ±10%, TA = 0°C to +70°C and CL = 15 pF (unless otherwise noted) Parameter Description Conditions Min. Typ. Max. Unit Vdd Power Supply Range 2.97 3.3 3.63 V VINH Input HIGH Voltage S0 Input 0.85 Vdd Vdd Vdd V VINM Input MIDDLE Voltage S0 Input 0.40 Vdd 0.50 Vdd 0.60 Vdd V VINL Input LOW Voltage S0 Input 0.0 0.0 0.15 Vdd V VOH1 Output HIGH Voltage IOH = 4 ma, SSCLK and REFCLK 2.4 – – V VOH2 Output HIGH Voltage IOH = 6 ma, SSCLK and REFCLK 2.0 – – V VOL1 Output LOW Voltage IOL = 4 ma, SSCLK Output – – 0.4 V VOL2 Output LOW Voltage IOL = 10 ma, SSCLK Output – – 1.2 V CIN1 Input Capacitance XIN (Pin 1) and XOUT (Pin 8) 6.0 7.5 9.0 pF CIN2 Input Capacitance All Digital Inputs 3.5 4.5 6.0 pF IDD1 Power Supply Current FIN=8 MHz, no load – 10.0 12.5 mA IDD3 Power Supply Current FIN=32 MHz, no load – 19.0 23.0 mA IDD4 Power Supply Current PD# = Vss – 150 250 mA Document #: 38-07362 Rev. *B Page 3 of 7 [+] Feedback CY25818/19 Table 5. Timing Electrical Characteristics Vdd = 3.3V ±10%, TA = 0°C to +70°C and CL = 15 pF (unless otherwise noted) Parameter Description Conditions Min. Typ. Max. Unit ICLKFR1 Input Frequency Range CY25818 8 – 16 MHz ICLKFR2 Input Frequency Range CY25819 16 – 32 MHz trise1 Clock Rise Time SSCLK and REFCLK, 0.4V to 2.4V 2.0 3.0 4.0 ns tfall1 Clock Fall Time SSCLK and REFCLK, 0.4V to 2.4V 2.0 3.0 4.0 ns CDCin Input Clock Duty Cycle XIN 20 50 80 % CDCout Output Clock Duty Cycle SSCLK and REFCLK @ 1.5V 45 50 55 % CCJss Cycle-to-Cycle Jitter SSCLK; FIN = FOUT = 8–32 MHz 250 350 ps CCJref Cycle-to-Cycle Jitter REFCLK; FIN = FOUT = 8–32 MHz 275 375 ps Characteristics Curves The following curves demonstrate the characteristic behavior of the CY25818/19 when tested over a number of environmental and application specific parameters. These are typical performance curves and are not meant to replace any parameter specified in Table 4 and Table 5. 200 210 220 230 240 250 260 270 280 290 300 8 1 2 16 2 0 24 2 8 32 Fr e que nc y ( M H z ) CCJ (ps) REFC LK CY2 5 8 18 S S C LK C Y25 818 REFC LK CY2 5 8 19 S S CLK CY2 5 8 19 Figure 2. CCJ (ps) vs. Frequency (MHz) 1.75 2 2.25 2.5 2.75 -40 -25 -10 5 20 35 50 65 80 95 110 125 Temp (C) BW % 12 MHz 32.0 MHz Figure 3. Bandwidth% vs. Temperature 10 11 12 13 14 15 16 17 18 19 20 8 12 16 2 0 2 4 2 8 3 2 Fr e que nc y ( M H z ) IDD(mA) C Y25819 16 -32 M H z C Y25818 8 - 16 M H z Figure 4. IDD (mA) vs. Frequency (MHz) 1.8 1.9 2 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3 3.1 2.8 2.9 3 3.1 3.2 3.3 3.4 3.5 3.6 3.7 VDD (volts) BW ( % ) CY25819@32 MHz CY25818@8.0 MHz Figure 5. Bandwidth% vs. Vdd Notes: 1. Single Power Supply: The voltage on any input or I/O pin cannot exceed the power pin during power-up. 2. Operation at any Absolute Maximum Rating is not implied. Document #: 38-07362 Rev. *B Page 4 of 7 [+] Feedback CY25818/19 SSCG Profiles CY25818/19 SSCG products use a non-linear “optimized” frequency profile as shown in Figure 6 and Figure 7. The use of Cypress proprietary “optimized” frequency profile maintains flat energy distribution over the fundamental and higher order harmonics. This results in additional EMI reduction in electronic systems. Application Schematic 1 8 14.3 MHz or 27.0 MHz Vss S0 XIN XOUT SSCLK Vdd CY25818 CY25819 3 4 0.1 uF C3 REFCLK C2 C3 27 pF 27 pF5 2 7 PD# 6 Figure 8. Typical Application Schematic 14.3 MHz (CY25818) 27.0 MHz (CY25819) Figure 6. CY25818 Spread Spectrum Profile(Frequency vs. Time)[3] Figure 7. CY25819 Spread Spectrum Profile (Frequency vs. Time)[4] Vdd Notes: 3. XIN = 16.0 MHz; S0 = 1; SSCLK = 16.0 MHz; BW = –2.14%. 4. Xin = 32.0MHz; S0 = 1; SSCLK = 32.0 MHz; BW = -2.15% Document #: 38-07362 Rev. *B Page 5 of 7 [+] Feedback CY25818/19 Ordering Information Part Number Package Type Product Flow CY25818SC 8-pin SOIC Commercial, 0° to 70°C CY25818SCT 8-pin SOIC–Tape and Reel Commercial, 0° to 70°C CY25819SC 8-pin SOIC Commercial, 0° to 70°C CY25819SCT 8-pin SOIC–Tape and Reel Commercial, 0° to 70°C Lead-free CY25818SXC 8-pin SOIC Commercial, 0° to 70°C CY25818SXCT 8-pin SOIC–Tape and Reel Commercial, 0° to 70°C CY25819SXC 8-pin SOIC Commercial, 0° to 70°C CY25819SXCT 8-pin SOIC–Tape and Reel Commercial, 0° to 70°C Package Drawing and Dimensions 8-lead (150-Mil) SOIC S8 - PIN1ID 41 1. DIMENSIONS IN INCHES[MM] MIN. MAX. 2. PIN1IDISOPTIONAL, ROUND ON SINGLE LEADFRAME 0.150[3.810] RECTANGULAR ON MATRIX LEADFRAME 0.157[3.987] 3. REFERENCE JEDEC MS-012 0.230[5.842] 0.244[6.197] 4. PACKAGE WEIGHT 0.07gms PART # S08.15 STANDARD PKG. SZ08.15 LEAD FREE PKG. 58 0.189[4.800] 0.010[0.254] 0.004[0.102] X 45° SEATING PLANE 0.196[4.978] 0.016[0.406] 0.061[1.549] 0.050[1.270] BSC 0.0075[0.190] 0.004[0.102] 0°~8° 0.016[0.406] 0.0098[0.249] 0.0098[0.249] 0.035[0.889] 0.068[1.727] 0.0138[0.350] 0.0192[0.487] 51-85066-*C All product and company names mentioned in this document may be the trademarks of their respective holders...

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