valutazioni - , GPA: ( )

Istruzioni per l'uso LG, Modello 49UH750V

Produttore : LG
File Size : 11.04 mb
File Nome :

Lingua di insegnamento:

Il documento viene caricato, si prega di attendere

Scarica la tua primo

Il documento viene caricato, si prega di attendere

Scarica la tua primo

EAN63846302
System Configuration
PAGE 1
IC101
+3.3V_NORMAL
IC102-*1
LGE1312(M16)
BR24G256FJ-3
R126
NVRAM
USB2-0
A0
VCC
10K
B23
V33
+3.3V_NORMAL
1
8
XTAL_IN
XIN
USB2_0_DP0
USB2_DP0
OPT
A24
V32
XTAL_OUT
XOUT
USB2_0_DM0
USB2_DM0
V31
R143
200
A1
WP
R127
USB2_0_TXRTUNE
AH18
1%
2
7
SOC_RESET
PORES_N
Clock for M16
USB2-1
AM8
22
USB2_1_DP0
WIFI_DP
EAN61133501
AA8
AN8
A2
SCL
3
6
C106
BOOT_MODE_0
USB2_1_DM0
WIFI_DM
IC102
AB8
AN7
R144
200
0.1uF
BOOT_MODE_1
USB2_1_TXRTUNE
16V
C104
AD7
1%
AT24C256C-SSHL-T
0.1uF
GND
SDA
PLLSET0
XTAL_IN
BOOT MODE
USB3-0
AC7
N32
EAW61645502
4
5
16V
PLLSET1
USB3_0_DP0
USB3_DP0
X101

P31
USB3_0_DM0
USB3_DM0
R101
A0
VCC
AE6
P32
C107
0.1uF
- ’00 ’: eMMC
X-TAL_1
GND_2
1
8
1M
OPM0
USB3_0_TX0P
USB3_TXP0
1
4
AE7
P33
C108
0.1uF
- ’10 ’: NAND
OPM1
USB3_0_TX0M
USB3_TXM0
GND_1
X-TAL_2
R102
120
A1
WP
N31
NVRAM_Rohm
2
7
- ’X1 ’: NOR (TEST ONLY)
2
3
1/16W
XTAL_OUT
USB3_0_RX0P
USB3_RXP0
33
AC3
M32
C101
AR106
L/DIM0_VS
L/DIM0_VS
L_VSOUT_LD
USB3_0_RX0M
USB3_RXM0
A2
SCL
5pF
C102
AC6
M33
3
6
I2C_SCL4
R145
200
L/DIM0_SCLK
L/DIM0_SCLK
DIM0_SCLK
USB3_0_RESREF
5pF
AD6
1%
50V
50V
TCK0
DIM1_SCLK
USB2-2
GND
SDA
AC5
T32
4
5
I2C_SDA4
TDI0
DIM1_MOSI
USB3_1_DP0
USB3_DP1
AD5
T31
L/DIM0_MOSI
L/DIM0_MOSI
DIM0_MOSI
USB3_1_DM0
USB3_DM1
U32
USB3_1_TX0P
NVRAM_ATMEL
AJ22
U33
MAIN Clock(24Mhz)
VX1_MSE
VX1_MSE
SPI_CS0
USB3_1_TX0M
AH22
R32
VX1_AGP
SPI_SCLK0
USB3_1_RX0P
AJ23
R33
VX1_AGP
EPI_LOCK_MNT
SPI_DO0
USB3_1_RX0M
AK23
U31
R146
200
SPI_DI0
USB3_1_RESREF
EPI_LOCK_MNT
AH24
1%
A_SPI_CS_S
SPI_CS1
AK24
U30
Write Protection
SPI_SCLK_S
SPI_SCLK1
HUB_PORT_OVER0
/USB_OCD1
+3.3V_NORMAL
+3.3V_NORMAL
AH23
U29
SPI_MOSI_S
SPI_DO1
HUB_VBUS_CTRL0
USB_CTL1
AJ24
- Low : Normal Operation
SPI_MISO_S
SPI_DI1
G28
- High : Write Protection
FORCED_JTAG_0
EB_CS3
/USB_OCD2
R173
OPT
10K
AB7
H28
EXT_INTR0
EB_CS2
USB_CTL2
+3.3V_TU
R134
4.7K
AC8
G29
EXT_INTR1
EB_CS1
/USB_OCD3
AD8
J28
EXT_INTR2
EB_CS0
USB_CTL3
AE8
EXT_INTR3
D28
EB_WE_N
EB_WE_N
AJ19
D29
SOC_RX
UART0_RXD
EB_OE_N
EB_OE_N
AH19
H29
SOC_TX
UART0_TXD
EB_WAIT
AH9
F28
UART1_RX
UART1_RXD
EB_BE_N1
EB_BE_N1
AR104
3.3K
AH8
E28
UART1_TX
UART1_TXD
EB_BE_N0
EB_BE_N0
I2C PULL UP
R199-*1
2.7K
R198-*1
2.7K
R199
1.8K
R198
1.8K
AH10
P29
TU_D_JP
TU_D_JP
CPU_VID[0]
UART1_RTS
CAM_CD1_N
CAM_CD1_N
AJ10
P30
CPU_VID[1]
UART1_CTS
CAM_CD2_N
CAM_CD2_N
TU_NON_JP_1.8K
TU_NON_JP_1.8K
P28
CAM_CE1_N
/PCM_CE1
1/16W
AJ13
R30
AR103
3.3K
AR102
3.3K
AR101
3.3K
33
I2C_SCL0
SCL0
CAM_CE2_N
/PCM_CE2
AR100
AH13
T29
I2C_SDA0
SDA0
CAM_IREQ_N
CAM_IREQ_N
R199-*2
1.2K
R198-*2
1.2K
I2C_SDA0
AK11
U28
I2C_SCL1
SCL1
CAM_RESET
PCM_RESET
AJ11
T28
I2C_SDA1
SDA1
CAM_INPACK_N
TU_NON_JP_1.2K
TU_NON_JP_1.2K
I2C_SCL0
CAM_INPACK_N
AH12
R29
I2C_SCL2
SCL2
CAM_VCCEN_N
PCM_5V_CTL
I2C_SDA1
AH11
R28
I2C_SDA2
SDA2
CAM_WAIT_N
CAM_WAIT_N
AK20
N29
I2C_SCL1
I2C_SCL3
SCL3
CAM_REG_N
CAM_REG_N
AJ20
I2C_SDA3
SDA3
I2C_SDA2
AK12
I2C_SCL4
SCL4
AJ12
A31
EB_ADDR[0]
I2C_SCL2
I2C_SDA4
SDA4
EB_ADDR0
AK21
B31
EB_ADDR[1]
I2C_SCL5
SCL5
EB_ADDR1
AJ21
A32
EB_ADDR[2]
I2C_SDA5
SDA5
EB_ADDR2
B32
EB_ADDR[3]
PWM2
EB_ADDR3
R139
33
Y7
B33
EB_ADDR[4]
I2C_SDA4
Designated GPIO
PWM_DIM2
PWM0
EB_ADDR4
R140
33
AA6
C31
EB_ADDR[5]
for OLED
PWM_DIM
I2C_SCL4
PWM1
EB_ADDR5
AA5
C33
EB_ADDR[6]
OLED_3D_EN
MODEL_OPT_12
PWM2
EB_ADDR6
R158
10K
Y6
C32
EB_ADDR[7]
PWM_IN
EB_ADDR7
E32
EB_ADDR[8]
EB_ADDR8
E33
EB_ADDR[9]
I2C_SDA5
EB_ADDR9
L31
F33
EB_ADDR[10]
EMMC_CLK
I2C_SCL5
EMMC_CLK
EB_ADDR10
K32
F31
EB_ADDR[11]
EMMC_CMD
EMMC_CMD
EB_ADDR11
D31
EB_ADDR[12]
EB_ADDR12
EMMC_DATA[7]
G31
D32
EB_ADDR[13]
EMMC_DATA7
EB_ADDR13
EMMC_DATA[6]
J32
E31
EB_ADDR[14]
EMMC_DATA6
EB_ADDR14
EMMC_DATA[5]
J33
F32
EMMC_DATA5
EB_ADDR15
F16_CONNECT_DET
EMMC_DATA[4]
H33
EMMC_DATA4
EMMC_DATA[3]
J31
EMMC_DATA3
EMMC_DATA[2]
G32
C30
EB_DATA[0]
EMMC_DATA2
EB_DATA0
EMMC_DATA[1]
H31
A30
EB_DATA[1]
EB_ADDR[0-14]
EMMC_DATA1
EB_DATA1
EMMC_DATA[0]
H32
B30
EB_DATA[2]
EMMC_DATA0
EB_DATA2
L32
C29
EB_DATA[3]
EMMC_CAL
EB_DATA3
I2C
OPT
K31
F29
EB_DATA[4]
EMMC_STRB
EB_DATA4
EMMC_DATA[0-7]
L33
F30
EB_DATA[5]
R188
33
EMMC_VCTRL
EB_DATA5
E30
EB_DATA[6]
EB_DATA6
I2C-0 : AMP
DEBUG EMMC
E29
EB_DATA[7]
EB_DATA7
I2C-1 : MICOM
SOC_EMMC_STRB
R142
10K
I2C-2 : T-CON,L/DIMING
EB_DATA[0-7]
1%
I2C-3 : S/Demod,T2/Demod, LNB
I2C-4 : NVRAM
I2C-5 : TUNER_MOPLL(T/C,ATV)
JTAG-0 I/F
6602T12004J
+3.3V_NORMAL
P102
12505WS-10A00
OPT
1
L/DIM0_VS
2
TDI0
3
L/DIM0_MOSI
4
L/DIM0_SCLK
5
TCK0
6
SOC_RESET
7
FORCED_JTAG_0
8
9
10
11
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
M16
2015.02.24
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
M16 Symbol A
1
26
Copyright ⓒ 2016 LG Electronics. Inc. All right reserved.
LGE Internal Use Only
Only for training and service purposes